Known work stations use a specific CPU, e.g., an Intel 80386 microprocessor provided on a system board together with other chip units such as memories, various peripheral interfaces and a system bus controller. The CPU and the above mentioned units communicate with each other, partially through buffers, over a local bus comprising control, address and data lines, all units being under tight control of the CPU through the local bus. In general, the system design is tailored for the specific CPU. This means that a large variety of different chip units are required for work stations using different CPUs. The local bus also is tailored for the specific configuration. In order to maintain compatibility with other systems, detailed specifications rigidly determine the features and functions of the various units and their I/O registers. Thus, it is difficult to modify the system for expansion and improved performance.
Many such work stations are designed to allow the direct transfer of data between the system memory and external devices, particularly external devices which are connected to an external or peripheral bus. With the recent availability of high performance peripheral busses, existing work stations are frequently unable to take full advantage of the available performance features. One such peripheral bus is a microchannel bus which defines an enhanced microchannel architecture (MCA). One feature of the enhanced microchannel architecture is a form of high speed data transfer referred to as "streaming mode", in which a starting address only is provided followed by consecutive data elements. In this manner, many data elements may be consecutively transferred without having to transmit an address for each element. A feature of streaming mode is that it is asynchronous, i.e., it is not tied to a clock, and very fast. For example, it has a maximum data rate of 80 MB/second.
In contrast, existing work stations operate in a synchronous environment, i.e. their operations are timed by a system clock. Furthermore, the time required to carry out transfers is frequently too slow to keep up with high performance external busses. For example, the normal transfer protocol supported by Intel processors requires at least two block cycles per transfer. Thus, such a work station which has a 20 MHZ CPU and a 32 bit (4 bytes) wide local bus can only transfer 40 MB/second.
A unique aspect of the present invention, described in more detail in some of the related applications referenced above, is the highly decentralized control of functions external to the CPU. This is achieved by the design of several integrated circuit chips to function, respectively, as intelligent interface units between the CPU and external devices such as a microchannel bus and system memory. The interface unit between the CPU and microchannel bus is referred to herein as the BIB (microchannel interface block). As will be discussed more fully, the BIB is largely autonomous of the CPU and performs a number of functions in relief of the CPU. For example, it is responsible for transfers of data between the memory and microchannel bus.
A problem which can arise in the design of a work station with an independent BIB relates to the number of external pins available on the BIB. The BIB provides numerous functions, many of which require communication with the CPU, microchannel bus and other external units. Increased functions place a high demand and competition for use of external pins on the BIB. It will be appreciated that the size of the chip is influenced directly by the number of pins. Because chip size is an important design consideration, the limitation of pin count is a highly desirable goal. One of the largest potential uses of external pins on the chip are address and data lines.